//0x10 bytes (sizeof)
union _PPM_POLICY_SETTINGS_MASK
{
ULONGLONG Buffer[2]; //0x0
ULONGLONG PerfDecreaseTime:1; //0x0
ULONGLONG PerfIncreaseTime:1; //0x0
ULONGLONG PerfDecreasePolicy:1; //0x0
ULONGLONG PerfIncreasePolicy:1; //0x0
ULONGLONG PerfDecreaseThreshold:1; //0x0
ULONGLONG PerfIncreaseThreshold:1; //0x0
ULONGLONG PerfMinPolicy:1; //0x0
ULONGLONG PerfMaxPolicy:1; //0x0
ULONGLONG PerfTimeCheck:1; //0x0
ULONGLONG PerfBoostPolicy:1; //0x0
ULONGLONG PerfBoostMode:1; //0x0
ULONGLONG ThrottlingPolicy:1; //0x0
ULONGLONG PerfHistoryCount:1; //0x0
ULONGLONG ParkingPerfState:1; //0x0
ULONGLONG LatencyHintPerf:1; //0x0
ULONGLONG LatencyHintEpp:1; //0x0
ULONGLONG LatencyHintUnpark:1; //0x0
ULONGLONG CPMinCores:1; //0x0
ULONGLONG CPMaxCores:1; //0x0
ULONGLONG CPDecreasePolicy:1; //0x0
ULONGLONG CPIncreasePolicy:1; //0x0
ULONGLONG CPDecreaseTime:1; //0x0
ULONGLONG CPIncreaseTime:1; //0x0
ULONGLONG CPOverUtilizationThreshold:1; //0x0
ULONGLONG CPDistributeUtility:1; //0x0
ULONGLONG CPConcurrencyThreshold:1; //0x0
ULONGLONG CPHeadroomThreshold:1; //0x0
ULONGLONG CPDistributeThreshold:1; //0x0
ULONGLONG IdleAllowScaling:1; //0x0
ULONGLONG IdleDisabled:1; //0x0
ULONGLONG IdleTimeCheck:1; //0x0
ULONGLONG IdleDemoteThreshold:1; //0x0
ULONGLONG IdlePromoteThreshold:1; //0x0
ULONGLONG EnergyPerfPreference:1; //0x0
ULONGLONG AutonomousActivityWindow:1; //0x0
ULONGLONG AutonomousMode:1; //0x0
ULONGLONG DutyCycling:1; //0x0
ULONGLONG FrequencyCap:1; //0x0
ULONGLONG IdleStateMax:1; //0x0
ULONGLONG ResponsivenessDisableThreshold:1; //0x0
ULONGLONG ResponsivenessEnableThreshold:1; //0x0
ULONGLONG ResponsivenessDisableTime:1; //0x0
ULONGLONG ResponsivenessEnableTime:1; //0x0
ULONGLONG ResponsivenessEppCeiling:1; //0x0
ULONGLONG ResponsivenessPerfFloor:1; //0x0
ULONGLONG SoftParkLatency:1; //0x0
ULONGLONG ModuleUnparkPolicy:1; //0x0
ULONGLONG ComplexUnparkPolicy:1; //0x0
ULONGLONG SmtUnparkPolicy:1; //0x0
ULONGLONG RestrictionCount:1; //0x0
ULONGLONG ResourcePriority:1; //0x0
ULONGLONG HeteroDecreaseTime:1; //0x0
ULONGLONG HeteroIncreaseTime:1; //0x0
ULONGLONG HeteroDecreaseThreshold:1; //0x0
ULONGLONG HeteroIncreaseThreshold:1; //0x0
ULONGLONG Class0FloorPerformance:1; //0x0
ULONGLONG Class1InitialPerformance:1; //0x0
ULONGLONG SchedulingPolicy:1; //0x0
ULONGLONG ShortSchedulingPolicy:1; //0x0
ULONGLONG ShortThreadRuntimeThreshold:1; //0x0
ULONGLONG ShortThreadArchClassUpperThreshold:1; //0x0
ULONGLONG ShortThreadArchClassLowerThreshold:1; //0x0
ULONGLONG LongThreadArchClassUpperThreshold:1; //0x0
struct
{
ULONGLONG LongThreadArchClassLowerThreshold:1; //0x0
ULONGLONG HeteroPolicy:1; //0x8
ULONGLONG HeteroContainmentIncreaseTime:1; //0x8
ULONGLONG HeteroContainmentDecreaseTime:1; //0x8
ULONGLONG HeteroEfficiencyContainmentThreshold:1; //0x8
ULONGLONG HeteroHybridContainmentThreshold:1; //0x8
};
ULONGLONG HeteroContainmentPolicy:1; //0x8
};